发明名称 Data processing system and data processor
摘要 One data processor is provided with an interface for realizing connection with the other data processor. This interface is provided with a function for connecting the other data processor as a bus master to an internal bus of the one data processor, and the relevant other data processor is capable of directly operating peripheral functions that are memory mapped to the internal bus from an external side via the interface. Accordingly, the data processor can utilize the peripheral functions of the other data processor without interruption of the program being executed. In short, one data processor can use in common the peripheral resources of the other data processor.
申请公布号 US8812750(B2) 申请公布日期 2014.08.19
申请号 US201314057442 申请日期 2013.10.18
申请人 Renesas Electronics Corporation 发明人 Nishimoto Junichi;Nakazawa Takuichiro;Yamada Koji;Hattori Toshihiro
分类号 G06F13/38 主分类号 G06F13/38
代理机构 Mattingly & Malur, PC 代理人 Mattingly & Malur, PC
主权项 1. A semiconductor integrated circuit device for use with a first processing unit and a display device, the semiconductor integrated circuit device comprising: a central processing unit; a first interface circuit; and a second interface circuit; wherein the semiconductor integrated circuit device has an operating mode and a standby mode as an operation mode thereof and operates in one of an operating mode and a standby mode, wherein the semiconductor integrated circuit device further includes: a first signal route which is from the first processing unit to the display device via the first interface unit, the central processing unit and the second interface unit; anda second signal route which is from the first processing unit to the display device via the second interface unit, wherein, in the operating mode, the semiconductor integrated circuit device receives first data signals from the first processing unit, the central processing unit conducts processing based on the first data signals from the first processing unit and is operable to provide second data signals from the semiconductor integrated circuit device to the display device via the first signal route, and wherein, in the standby mode, the second interface unit and the second signal route are provided with a power supply, and third data signals from the first processing unit are directly provided to the display device via the second signal route, wherein the third data signals include display data for the display device, and wherein the standby mode is a lower consumption state than the operating mode.
地址 Kanagawa JP