发明名称 Method to reduce system idle power through system VR output adjustments during Soix states
摘要 An electronic device includes a power control circuit to generate a power mode signal and a plurality of voltage regulators to receive the power mode signal. Each voltage regulator reduces an output voltage in response to the power mode signal, and the reduced output voltage of each voltage regulator is used to power a different circuit of or function to be performed in the electronic device.
申请公布号 US8810065(B2) 申请公布日期 2014.08.19
申请号 US201313753514 申请日期 2013.01.29
申请人 Intel Corporation 发明人 Browning David W.
分类号 H02J1/10 主分类号 H02J1/10
代理机构 KED & Associates 代理人 KED & Associates
主权项 1. An electronic device comprising: a circuit to provide a power mode signal when the electronic device is to enter a reduced power state; and a first voltage regulator to provide a first voltage and a second voltage less than the first voltage, the first voltage regulator to provide the second voltage in response to the power mode signal, and a second voltage regulator to provide a third voltage and a fourth voltage less than the third voltage, the second voltage regulator to provide the fourth voltage in response to the power mode signal, the first voltage regulator is to output the second voltage independently from the second voltage regulator outputting the fourth voltage in response to a same signal that corresponds to the power mode signal, the first voltage regulator to receive the power mode signal, the second voltage regulator to receive the power mode signal, and the first and second voltage regulators to supply output voltages to power circuits or functions different from a central processor of the electronic device, and the first and second voltage regulators to reduce output voltages to power the circuits or functions different from the central processor in response to the power mode signal and independent from changing power to the central processor.
地址 Santa Clara CA US