Method of fabricating vertical structure LEDs

摘要

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

主权项

1. A semiconductor light-emitting device, comprising:
a conductive support structure; a semiconductor structure over the conductive support structure, the semiconductor structure having a first surface, a second surface, and a side surface, wherein the semiconductor structure comprises a p-type layer, an active layer on the p-type layer, and an n-type layer on the active layer, wherein the second surface is opposite the first surface, and wherein the first surface, relative to the second surface, is proximate to the conductive support structure; a first metal electrically connected to the p-type layer, wherein the first metal is located between the conductive support structure and the first surface of the semiconductor structure; a passivation layer comprising a first portion on the second surface of the semiconductor structure and a second portion on the side surface of the semiconductor structure, wherein the first portion has a first surface contacting the second surface of the semiconductor structure and a second surface opposite the first surface of the first portion; and a second metal electrically connected to the n-type layer, wherein the second metal is located on the second surface of the semiconductor structure, wherein the second metal comprises a first part located higher than the second surface of the first portion, and wherein a contact area between the second metal and the semiconductor structure is greater than a contact area between the second metal and the passivation layer.