发明名称 Storage device, control method of storage device, and control method of storage control device
摘要 Memory cell regions as units of erasing operation are sectors S, and units of reading operation and/or writing operation are blocks B0 to B3 in a sector, in which a block address BA for selecting one of blocks B0 to B3 is held in block address buffer (BAB) 3. Holding operation is executed prior to reading or writing operation, and hence in subsequent reading operation or writing operation, re-input is not needed. Depending on the held block address BA, any one of selection signals YDn (n=0 to 3) is selected, and any one block is selected depending on the selection signal YDn. This state is maintained until the block address BA held in the block address buffer (BAB) 3 is rewritten, and therefore it is not required to enter or decode the block address BA on every occasion of reading and/or writing operation, so that the access operation can be executed promptly and at low current consumption.
申请公布号 US8811107(B2) 申请公布日期 2014.08.19
申请号 US201213725749 申请日期 2012.12.21
申请人 Spansion LLC 发明人 Niimi Masahiro
分类号 G11C8/12 主分类号 G11C8/12
代理机构 代理人
主权项 1. A control method of a storage device which comprises a memory cell array comprised of a plurality of sectors each of which is a memory cell region that is associated as a unit with an erase operation, the control method comprising: inputting a first address signal which selects a partial region of a plurality of partial regions when a readout operation and a write operation starts, the partial region being defined as one unit of access wherein the partial regions are identified based on the quantity of data involved in an access; holding the inputted first address signal during the readout operation and the write operation of the partial region, wherein the partial region comprises a plurality of data readout lines which are placed in the sector and partitioned; and retaining the plurality of the data readout lines in a selected state during the readout operation and/or the write operation depending on the held first address signal.
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