发明名称 System and method for automated real-time design checking
摘要 Systems and methods for real-time design checking of an integrated circuit design, include the operations of receiving at a design tool, design elements of an integrated circuit design entered by an integrated circuit designer; the design tool performing real-time design checks on the design elements as they are entered by the integrated circuit designer to determine whether a design element violates a design rule; when the design tool detects a violation of a design rule based on the design checks alerting the integrated circuit designer; and the design tool presenting a correction to correct the violation of the design rule. The real-time design checks can include, comparing each design element to one or more known non-compliant design elements stored in a database to determine whether a non-compliant design element was entered or is being entered by the integrated circuit designer.
申请公布号 US8807948(B2) 申请公布日期 2014.08.19
申请号 US201113248914 申请日期 2011.09.29
申请人 Cadence Design Systems, Inc. 发明人 Luo Wilbur;Pribetich Olivier;Omedes Olivier;Ruehl Roland;Lai Ya-Chieh;Gennari Frank E.
分类号 B63H1/06 主分类号 B63H1/06
代理机构 Kenyon & Kenyon LLP 代理人 Kenyon & Kenyon LLP
主权项 1. A method for real-time design checking for an integrated circuit design, comprising: receiving at a design tool implemented with a processor, design elements of an integrated circuit design entered by an integrated circuit designer; the design tool performing real-time design checks on the design elements as they are entered by the integrated circuit designer to determine whether a design element violates a design rule; when the design tool detects a violation of a design rule based on the design checks alerting the integrated circuit designer; and upon detection of a violation, the design tool automatically presenting a design element compliant with the violated design rule to the integrated circuit designer to correct the violation of the design rule.
地址 San Jose CA US