发明名称 Information processing apparatus and program
摘要 According to one embodiment, an information processing apparatus includes a first signal input unit configure to receive a first signal, a second signal input unit configure to receive a signal, a first control unit configure to acquire system resources, a second control unit configure to select, in accordance with information of the system resources acquired by the first control unit, a processing method for suppressing at least one of echo and noise of the second signal input from the second signal input unit containing the echo due to the first signal input from the first signal input unit, a third control unit configure to generate an output signal by suppressing at least one of the echo and the noise from the second signal by the processing method selected by the second control unit, and a signal output unit configure to output the output signal generated by the third control unit.
申请公布号 US8811623(B2) 申请公布日期 2014.08.19
申请号 US201313766070 申请日期 2013.02.13
申请人 Kabushiki Kaisha Toshiba 发明人 Sudo Takashi;Miseki Kimio
分类号 H04B3/20 主分类号 H04B3/20
代理机构 Knobbe Martens Olson & Bear LLP 代理人 Knobbe Martens Olson & Bear LLP
主权项 1. An information processing apparatus comprising: a first signal input unit configured to receive a first input signal; a second signal input unit configured to receive a second input signal; a first control unit configured to acquire system resources; a second control unit configured to select, in accordance with information of the system resources acquired by the first control unit, a processing method for suppressing at least one of echo and noise of the second input signal input from the second signal input unit containing the echo due to the first input signal input from the first signal input unit; a third control unit configured to generate an output signal by suppressing at least one of the echo and the noise from the second input signal by the processing method selected by the second control unit; a signal output unit configured to output the output signal generated by the third control unit; a buffer configured to store the first input signal; and a fourth control unit configured to control synchronism between the first input signal and the second input signal, wherein the fourth control unit initializes the buffer in accordance with the information of the system resources.
地址 Tokyo JP