发明名称 Micro-fluid ejection device and method for assembling a micro-fluid ejection device by a wafer-to-wafer bonding
摘要 A micro-fluid ejection device is assembled by wafer-to-wafer bonding at a temperature below about 150° C. a first silicon oxide layer of a first wafer, having flow features patterned in the first silicon oxide layer on an actuator chip in a first silicon substrate of the first wafer, to a second silicon oxide layer of a second wafer, defining a nozzle plate on a second silicon substrate of the second wafer. Nozzle holes are formed in the nozzle plate in alignment with actuator elements of the actuator chip of the first wafer either before or after bonding the first and second wafers together. The second silicon substrate of the second wafer is used as a handle and then removed from the silicon oxide layer of the second wafer after bonding the first and second wafers together.
申请公布号 US8806752(B2) 申请公布日期 2014.08.19
申请号 US201213407865 申请日期 2012.02.29
申请人 Funai Electric Co., Ltd. 发明人 Reitmeier Zachary Justin
分类号 B21D53/76;B23P17/00;B41J2/135 主分类号 B21D53/76
代理机构 Amster, Rothstein & Ebenstein LLP 代理人 Amster, Rothstein & Ebenstein LLP
主权项 1. A method for assembling a micro-fluid ejection device, comprising: positioning separate first and second wafers together, the first wafer comprising a first silicon substrate, a first silicon oxide layer disposed on the first silicon substrate and flow features patterned in the first silicon oxide layer, the second wafer comprising a second silicon substrate, a second silicon oxide layer disposed on the second silicon substrate and a nozzle plate defined by the second silicon oxide layer, such that the wafers meet at an interface between the first and second silicon oxide layers; and after the positioning step, wafer-to-wafer bonding the first and second wafers together at the interface at a temperature between 90° C. and 150° C. such that the flow features patterned in the first silicon oxide layer of the first wafer are bonded to the nozzle plate defined by the second silicon oxide layer of the second wafer.
地址 Osaka JP