发明名称 Laminated inductor element and manufacturing method thereof
摘要 In a laminated inductor element, outer electrodes and terminal electrodes are electrically connected by via holes, internal wiring lines, and end surface electrodes. The via holes on an upper surface side are provided immediately under the outer electrodes and in a non-magnetic ferrite layer. The via holes on a lower surface side are provided immediately above the terminal electrodes and in a non-magnetic ferrite layer. Since outermost layers are defined by the non-magnetic ferrite layers, a parasitic inductance is not increased, even if the outermost layers are provided with the via holes. In this case, the internal wiring lines are not routed on a surface of the element. Therefore, there is no complication of a wiring pattern, and it is possible to prevent an increase in a mounting area of the element.
申请公布号 US8810352(B2) 申请公布日期 2014.08.19
申请号 US201313955505 申请日期 2013.07.31
申请人 Murata Manufacturing Co., Ltd. 发明人 Yokoyama Tomoya;Sato Takako;Ieda Akihiro;Hayashi Shigetoshi;Yazaki Hirokazu
分类号 H01F5/00;H01F27/29;H01L23/12;H01F41/04;H01F17/00;H01F3/14 主分类号 H01F5/00
代理机构 Keating & Bennett, LLP 代理人 Keating & Bennett, LLP
主权项 1. A laminated inductor element comprising: a magnetic layer defined by a lamination of a plurality of magnetic sheets; a non-magnetic layer defined by a lamination of a plurality of non-magnetic sheets, and disposed on outermost layers and in an intermediate layer of the laminated inductor element; an inductor including coils provided between the laminated sheets and connected in a lamination direction; a via hole provided in the non-magnetic layer on each of the outermost layers; an end surface electrode provided on an end surface of the laminated inductor element; a plurality of mounting electrodes located on respective surfaces of the outermost layers; and an internal wiring line configured to electrically connect the via hole and the end surface electrode; wherein the plurality of mounting electrodes includes a plurality of outer electrodes located on a principal surface of one of the outermost layers and electrically connected to semiconductor devices or passive elements mounted thereon, and a plurality of terminal electrodes located on a principal surface of another of the outermost layers and electrically connected to an outer mounting substrate; and at least some of the plurality of outer electrodes are electrically connected to the plurality of terminal electrodes through the via hole, the internal wiring line, and the end surface electrode, such that an electrical connection through the via hole does not pass through the magnetic layer.
地址 Kyoto JP