CMOS transistor linearization method

摘要

A circuit for sampling an analog input signal may include a transistor disposed on a substrate and a sampling capacitor coupled to one of the source and the drain of the transistor. The transistor may be disposed on a substrate that is coupled to ground. A source and a drain of the transistor may be disposed in a back gate of the transistor. The analog input may be supplied to one of the source and the drain of the transistor, and the back gate may receive a back gate voltage having a value that is lower than ground.

主权项

1. A circuit, comprising:
a MOSFET transistor comprising a source terminal, a drain terminal, a gate terminal and a backgate terminal, the gate terminal controlled as an input switch, a signal source coupled to the source terminal, to generate a continuous time varying input signal that varies between a high and low voltage limit, and a reference voltage source, coupled to the backgate terminal to provide a reference voltage when the transistor is on and not coupled to the backgate terminal when the transistor is off, wherein the reference voltage exceeds one of the voltage limits of the continuous time varying input signal.