Replacement gate fin first wire last gate all around devices

摘要

In one aspect, a method of fabricating a nanowire FET device includes the following steps. A wafer is provided. At least one sacrificial layer and silicon layer are formed on the wafer in a stack. Fins are patterned in the stack. Dummy gates are formed over portions of the fins which will serve as channel regions, and wherein one or more portions of the fins which remain exposed will serve as source and drain regions. A gap filler material is deposited surrounding the dummy gates and planarized. The dummy gates are removed forming trenches in the gap filler material. Portions of the silicon layer (which will serve as nanowire channels) are released from the fins within the trenches. Replacement gates are formed within the trenches that surround the nanowire channels in a gate all around configuration. A nanowire FET device is also provided.

主权项

1. A method of fabricating a nanowire field-effect transistor (FET) device, comprising the steps of:
providing a wafer; forming at least one sacrificial layer and at least one silicon layer on the wafer in a stack, wherein the sacrificial layer comprises an epitaxial crystalline material which can be etched selectively to silicon; patterning a plurality of fins in the stack by patterning the sacrificial layer and the silicon layer to form the fins; forming a plurality of dummy gates over one or more first portions of the fins which will serve as channel regions of the FET device, and wherein one or more second portions of the fins which remain exposed after the step of forming the dummy gates has been performed will serve as source and drain regions of the FET device; depositing a gap filler material surrounding the dummy gates; planarizing the gap filler material; removing the dummy gates selective to the gap filler material so as to form trenches in the gap filler material; releasing portions of the silicon layer from the fins within the trenches by removing from the fins only those portions of the sacrificial layer that were patterned to form the fins and that are present within the trenches, wherein the portions of the silicon layer released within the trenches will serve as nanowire channels of the FET device and by way of the releasing step only the nanowire channels are released from the fins; and forming a plurality of replacement gates within the trenches that surround the nanowire channels of the FET device in a gate all around configuration.