发明名称 Patterned dummy wafers loading in batch type CVD
摘要 A method for semiconductor device fabrication is provided. The present invention is directed towards using at least one patterned dummy wafer along with one or more product wafers in a film deposition system to create a sidewall layer thickness variation that is substantially uniform across all product wafers. The at least one patterned dummy wafer may have a high density patterned substrate surface with a topography that is different from or substantially similar to a topography of the one or more product wafers. Furthermore, in a batch type Chemical Vapor Deposition (CVD) system, the at least one patterned dummy wafer may be placed near a gas inlet of the CVD system. At least one patterned dummy wafer may be placed near an exhaust of the CVD system. Additionally, the patterned dummy wafers may be reusable in subsequent film deposition processes.
申请公布号 US8809206(B2) 申请公布日期 2014.08.19
申请号 US201113022517 申请日期 2011.02.07
申请人 Spansion LLC 发明人 Sugino Rinji;Davis Bradley Marc;Xue Lei;Ohtsuka Kenichi
分类号 H01L21/31 主分类号 H01L21/31
代理机构 Sterne, Kessler, Goldstein & Fox PLLC 代理人 Sterne, Kessler, Goldstein & Fox PLLC
主权项 1. A method for semiconductor device fabrication, the method comprising: loading one or more product wafers in a film deposition system, wherein the one or more product wafers includes a patterned substrate surface; loading a plurality of dummy wafers in the film deposition system, wherein the plurality of dummy wafers are arranged substantially parallel to the one or more product wafers, wherein at east one of the plurality of dummy wafers has a patterned substrate surface different from another patterned substrate surface of at least one other dummy wafer of the plurality of dummy wafers; and performing a film deposition process to create at least a sidewall layer on the patterned substrate surface of the one or more product wafers.
地址 Sunnyvale CA US