Filter processing device and semiconductor device

摘要

The present invention provides a technique for changing the number of taps in filter processing without the need for execution of branch processing. A filter processing device comprises: an arithmetic circuit that performs arithmetic processing for filtering operation; an internal register that retains data to be subjected to arithmetic processing in the arithmetic circuit and that receives the result of arithmetic processing from the arithmetic circuit as data to be written back thereto; and a data generator that generates data to be fed to the arithmetic circuit through use of the data retained in the internal register. Further, in the filter processing device, there is disposed a tap number control circuit that is capable of controlling the number of taps in filter processing according to a tap control signal applied thereto. In this configuration, no branch processing is required for controlling the number of taps by the use of the tap number control circuit.

主权项

1. A semiconductor device comprising:
an instruction decoder that decodes input instructions; a tap number control circuit that is capable of controlling the number of taps in filter processing according to a tap control signal applied thereto through the instruction decoder; an index generator that is capable of generating an offset source index by compensation of a source index received through the instruction decoder; an internal register that is capable of outputting data corresponding to the source index; and an arithmetic circuit that performs arithmetic processing for filtering operation on data fed from the internal register; wherein the arithmetic circuit comprises: a shift register that is capable of shifting data fed from the internal register; and a single-instruction multiple-data arithmetic circuit that performs arithmetic processing on output data from the shift register; and wherein the tap number control circuit comprises: a horizontal tap number control register that is capable of retaining the number of taps in horizontal filter processing and capable of updating the number of taps retained therein according to update data; a horizontal tap number counter and a vertical tap number counter, each being arranged to change a count value according to a count value update signal; a vertical tap number control register that is capable of retaining the number of taps in vertical filter processing and capable of updating the number of taps retained therein according to update data; a controller that sets up an initial value in each of the horizontal tap number control register and the vertical tap number control register according to a control signal output from the instruction decoder, and that initializes each of the horizontal tap number counter and the vertical tap number counter according thereto; a first comparator that performs a comparison between a value retained in the horizontal tap number control register and a value indicated by the horizontal tap number counter, and that serves to operate the shift register and to update the vertical tap number counter according to the result of comparison; and a second comparator that performs a comparison between a value retained in the vertical tap number control register and a value indicated by the vertical tap number counter, and that issues an end-of-filtering signal according to the result of comparison.