METHOD AND APPARATUS FOR ADAPTIVE TIMING WRITE CONTROL IN A MEMORY

摘要

A bit line connected to a resistive element of a memory cell is set with a first voltage level. The memory cell is an MRAM cell or a RRAM cell. The resistive element includes a first resistance in a first state of the memory cell and a second resistance in a second state of the memory cell. A source line which is selectively connected to the memory cell by an access transistor is set with a second voltage level. A word line signal is asserted to apply a first bias voltage to both ends of the resistive element. A writing operation is started in the memory cell by the first bias voltage. The word line signal is deasserted based on the detection of a current through the resistive element for the writing operation.