MEMORY MODULE, AND MEMORY SYSTEM INCLUDING THE SAME

摘要

According to the present invention, a memory module includes a plurality of semiconductor memory devices. Each of the semiconductor memory devices includes a memory cell array which includes a plurality of memory cells arranged in a region where a plurality of bit lines and a plurality of word lines cross each other; a mode register set (MRS) circuit which generates an enable signal corresponding to an error generation mode for each of the semiconductor memory devices in response to an MRS command applied from a command decoder; and an address buffer which compares an address signal inputted from the outside with a prestored, predetermined address signal, based on the enable signal. When the address signal inputted from the outside is identical with the predetermined address signal, data other than data inputted from the outside is written to a memory cell corresponding to the predetermined address signal.