发明名称 Method for Producing Group III Nitride Semiconductor
摘要 Group III nitride semiconductor having reduced threading dislocation density and uniform Ga-polar surface is provided. Forming a capping layer on a buffer layer containing Al as an essential element at a temperature lower than a temperature at which an oxide of element constituting the buffer layer is formed. Heat treating the substrate having the buffer layer covered by the capping layer at a temperature higher than a temperature at which a crystal of body semiconductor grows without exposing the surface of the buffer layer. The substrate temperature is decreased to a temperature at which a crystal of the body semiconductor grows and the body semiconductor is grown.
申请公布号 US2014227864(A1) 申请公布日期 2014.08.14
申请号 US201414178152 申请日期 2014.02.11
申请人 Toyoda Gosei Co., Ltd. 发明人 OKUNO Koji;OSHIO Takahide;SHIBATA Naoki;AMANO Hiroshi
分类号 H01L21/02 主分类号 H01L21/02
代理机构 代理人
主权项 1. A method for growing Group III nitride semiconductor on a substrate made of a material different from Group III nitride semiconductor, the method comprising: forming a buffer layer of AlN or AlxInyGa1-x-yN (0<x<1, 0≦y<1, 0<x+y≦1) containing Al as an essential element, in a polycrystal, amorphous or polycrystal/amorphous mixed state, on the substrate; forming a capping layer of GaN, InuGa1-uN (0<u≦1), or AlvInwGa1-v-wN (0<v<1, 0≦w<1, 0<v+w≦1) having an Al composition ratio lower than 1/2 of that of the buffer layer on the buffer layer at a temperature lower than a temperature at which an oxide of element constituting the buffer layer is formed; performing heat treatment of the substrate having the buffer layer covered by the capping layer at a heat treatment temperature which is higher than a temperature at which a crystal of body semiconductor comprising Group III nitride semiconductor grows, without exposing the surface of the buffer layer; and after the heat treatment, lowering the substrate temperature to a temperature at which a crystal of the body semiconductor grows, and growing the body semiconductor on the buffer layer covered by the capping layer or the exposed buffer layer.
地址 Kiyosu-shi JP