LOAD AND SHORT CURRENT MEASUREMENT BY CURRENT SUMMATION TECHNIQUE

摘要

Methods for monitoring one or more load currents corresponding with one or more voltage regulators used during operation of a semiconductor memory are described. The one or more load currents may be due to the biasing of memory cells within a memory array or due to the presence of shorts between lines in the memory array. In some embodiments, a plurality of load currents corresponding with a plurality of voltage regulators may be monitored in real-time before and during biasing of one or more memory arrays. The plurality of load currents may be monitored using a configurable load current monitoring circuit that uses a current summation technique. The ability to monitor the plurality of load currents before performing a programming operation on a memory array allows for remapping of defective portions of the memory array and modification of programming bandwidth prior to the programming operation.

主权项

1. A monolithic three-dimensional integrated circuit, comprising:
a three-dimensional memory array including a first layer of memory cells and a second layer of memory cells, the first layer of memory cells includes a first memory cell, the second layer of memory cells includes a second memory cell, the first memory cell is located above the second memory cell, the second memory cell is located above a substrate, the first memory cell and the second memory cell are formed above the substrate without any intervening substrates between the first memory cell and the second memory cell; and a controller in communication with the three-dimensional memory array, the controller causes a first set of memory operations to be performed on the three-dimensional memory array, a first set of biasing conditions is applied to the three-dimensional memory array during the first set of memory operations, the controller detects that a load current associated with a voltage regulator biasing the three-dimensional memory array during the first set of memory operations is greater than a threshold, the controller determines a second set of biasing conditions different from the first set of biasing conditions in response to detecting that the load current is greater than the threshold, the controller causes a second set of memory operations to be performed on the three-dimensional memory array, the second set of biasing conditions is applied to the three-dimensional memory array during the second set of memory operations.