发明名称 METHOD FOR DESIGNING SEMICONDUCTOR DEVICE, PROGRAM, AND DESIGN DEVICE
摘要 PROBLEM TO BE SOLVED: To suppress the occurrence of jitter constraint violation.SOLUTION: A method of designing a semiconductor device comprises the steps of: obtaining a relation between a distance from a back bias control unit 1 that controls the back bias of a transistor Tr and the amount of noise of a control signal that is output from the back bias control unit 1 (step S1); obtaining the amount of increase in jitter due to the amount of the noise on a clock path that is connected to a circuit section (IP macro) 2, on the basis of a relation between the back bias control unit 1 and the amount of noise (step S2); and arranging the circuit section 2 and clock path on the basis of the amount of increase in the jitter and an allowable value of the jitter in the circuit section 2 (step S3).
申请公布号 JP2014146220(A) 申请公布日期 2014.08.14
申请号 JP20130015030 申请日期 2013.01.30
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 ASANO KOSHO
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04 主分类号 G06F17/50
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