发明名称 |
DATA PROCESSING APPARATUS HAVING A PARALLEL PROCESSING CIRCUIT INCLUDING A PLURALITY OF PROCESSING MODULES, AND METHOD FOR CONTROLLING THE SAME |
摘要 |
In an apparatus which includes a plurality of processing modules connected via a ring-shape bus, if a plurality pieces of pipeline processing to be processed in a different order is allocated to a plurality of processing modules, the transfer efficiency may decrease when an amount of data transferred from one of the processing modules to a post-stage module exceeds a processing capacity of the post-stage module. Accordingly, a module positioned on the preceding side in the pipeline processing controls a transmission interval of processed data so that the post-stage module can receive the data processed by the preceding module. |
申请公布号 |
US2014229639(A1) |
申请公布日期 |
2014.08.14 |
申请号 |
US201414263760 |
申请日期 |
2014.04.28 |
申请人 |
CANON KABUSHIKI KAISHA |
发明人 |
Watanabe Hiroyasu;Inoue Hirowo;Ishikawa Hisashi |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
1. A control apparatus for controlling a data processing apparatus configured to cause a plurality of modules, which is communicably connected to one another, to perform pipeline processing on a packet storing data in a predetermined order, the control apparatus comprising:
an obtaining unit configured to obtain order information that indicates an order in which the plurality of modules performs the pipeline processing on the data; and a setting unit configured to identify, according to the order information, a target module among the plurality of modules in an order opposite to the order in which the plurality of modules performs the pipeline processing, and set an output interval of a module positioned in a stage preceding the target module based on an output interval of the target module. |
地址 |
Tokyo JP |