发明名称 VECTOR AND SCALAR BASED MODULAR EXPONENTIATION
摘要 An embodiment includes a method for computing operations, such as modular exponentiation, using a mix of vector and scalar instructions to accelerate various applications such as encryption protocols that rely heavily on large number arithmetic operations. The embodiment requires far fewer instructions to execute the operations than more conventional practices. Other embodiments are described herein.
申请公布号 US2014229716(A1) 申请公布日期 2014.08.14
申请号 US201213994717 申请日期 2012.05.30
申请人 INTEL CORPORATION 发明人 Gueron Shay;Krasnov Vlad
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项 1. At least one machine readable medium comprising a plurality of instructions that in response to being executed on a computing device, cause the computing device to carry out a method comprising: converting first and second integers from a first format to a second format; wherein the first and second integers each have more digits in the second format than in the first format and each of the digits in the second format is smaller in bit size than in the first format; performing an arithmetic operation between the first and second converted digits using both scalar and vector instructions; and determining a modular exponentiation (ME) based on the arithmetic operation.
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