发明名称 |
IDENTIFYING CIRCUIT ELEMENTS FOR SELECTIVE INCLUSION IN SPEED-PUSH PROCESSING IN AN INTEGRATED CIRCUIT, AND RELATED CIRCUIT SYSTEMS, APPARATUS, AND COMPUTER-READABLE MEDIA |
摘要 |
Embodiments of the disclosure include identifying circuit elements for selective inclusion in speed-push processing and related circuit systems, apparatus, and computer-readable media. A method for altering a speed-push mask is provided, including analyzing a circuit design comprising a plurality of cells to which a speedpush mask is applied to identify at least one of the plurality of cells as having performance margin. The speed-push mask is altered such that the at least one of the plurality of cells having performance margin may be fabricated as a non-speed-pushed cell. Additionally, a method for creating a speed-push mask is provided, including analyzing a circuit design comprising a plurality of cells to identify at least one of the plurality of cells below a performance threshold. A speed-push mask is created such that the at least one of the plurality of cells below the performance threshold may be fabricated as a speed-pushed cell. |
申请公布号 |
WO2014100660(A3) |
申请公布日期 |
2014.08.14 |
申请号 |
WO2013US77079 |
申请日期 |
2013.12.20 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
FISCHER, JEFFREY H.;FLEDERBACH, WILLIAM R.;KIM, KYUNGSEOK;BUCKI, ROBERT J.;GAN, CHOCK H.;GOODALL, III, WILLIAM J. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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