CHIP SCALE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

摘要

A chip scale package structure includes a chip, a dam unit, a board body, a plurality of first conductors, an encapsulating glue, a plurality of first conductive layers, an isolation layer, and a plurality of first electrodes. The dam unit is disposed on the surface of the chip. The board body is located on the dam unit. The first conductors are respectively in electrical contact with the conductive pads of the chip. The encapsulating glue covers the surface of the chip, and the board body and the first conductors are packaged in the encapsulating glue. The first conductive layers are located on the surface of the encapsulating glue opposite to the chip and respectively in electrical contact with the first conductors. The isolation layer is located on the encapsulating glue and the first conductive layers. The first electrodes are respectively in electrical contact with the first conductive layers.

主权项

1. A chip scale package structure comprising:
a chip, wherein a surface of the chip has a plurality of conductive pads; a dam unit disposed on the surface of the chip and between the conductive pads, wherein the dam unit surrounds an active area of the chip; a board body located on the dam unit, wherein a space is formed among the board body, the dam unit, and the chip; a plurality of first conductors respectively in electrical contact with the conductive pads; an encapsulating glue covering the surface of the chip, wherein the board body and the first conductors are packaged in the encapsulating glue; a plurality of first conductive layers located on a surface of the encapsulating glue opposite to the chip and respectively in electrical contact with the first conductors; an isolation layer located on the encapsulating glue and the first conductive layers; and a plurality of first electrodes respectively in electrical contact with the first conductive layers and protruding from the isolation layer.