发明名称 |
OPTIMIZING fuseROM USAGE FOR MEMORY REPAIR |
摘要 |
A memory repair system in an integrated circuit (IC) (100) that optimizes the fuseROM used for memory repair. The IC includes a plurality of memory wrappers (102). Each memory wrapper (104, 106, 108, 110, 112, 114) includes a memory block (122A-F) with a fuse register (124A-F) and a bypass register (126A-F). The bypass registers have a bypass data that indicates a defective memory wrapper of the plurality of memory wrappers. A fuseROM controller (140) is coupled to the plurality of memory wrappers. A memory bypass chain (134) links the bypass registers in the plurality of memory wrappers with the fuseROM controller. The fuseROM controller loads the bypass data in the memory bypass chain. A memory data chain (132) links the fuse registers in the plurality of memory wrappers with the fuseROM controller. The memory data chain is re-configured to link the fuse registers in a set of defective memory wrappers of the plurality of memory wrappers responsive to the bypass data loaded in the memory bypass chain. |
申请公布号 |
WO2014124218(A1) |
申请公布日期 |
2014.08.14 |
申请号 |
WO2014US15236 |
申请日期 |
2014.02.07 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS JAPAN LIMITED |
发明人 |
VARADARAJAN, DEVANATHAN;ELLUR, HARSHARAJ |
分类号 |
G11C29/12;G01R31/3187;G06F11/27 |
主分类号 |
G11C29/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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