发明名称 |
METHOD AND APPARATUS FOR SYSTEM TESTING USING MULTIPLE PROCESSORS |
摘要 |
<p>An apparatus for use in testing at least a portion of a system under test via a Test Access Port (TAP) is provided. The apparatus includes a memory for storing a set of instructions of a test instruction set architecture and a processor executing the set of instructions of the test instruction set architecture for testing at least a portion of the system under test via the TAP. The set of instructions of the test instruction set architecture includes a first set of instructions including a plurality of instructions of an Instruction Set Architecture (ISA) supported by the processor and a second set of instructions including a plurality of test instructions associated with the TAP. The instructions of the first set of instructions and the instructions of the second set of instructions are integrated to form the set of instructions of the test instruction set architecture.</p> |
申请公布号 |
EP2404183(B1) |
申请公布日期 |
2014.08.13 |
申请号 |
EP20100710945 |
申请日期 |
2010.03.03 |
申请人 |
ALCATEL LUCENT |
发明人 |
GOYAL, SURESH;PORTOLAN, MICHELE;VAN TREUREN, BRADFORD |
分类号 |
G01R31/3185 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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