发明名称 APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION IN SYSTEM ON CHIP
摘要 An apparatus and method for reducing power consumption in a System on Chip (SoC) are provided. The SoC includes a clock unit for providing clocks to all elements included in the SoC, a Central Processing Unit (CPU) for controlling the SoC to perform designated functions, a main regulator for supplying power provided from an external battery to remaining elements included in the SoC other than a PMU, and a restoration processor for storing, in the PMU, registration information on the CPU and all peripherals included in the SoC when a transition from an active state to a sleep state is made. The PMU stops provision of a clock from the CPU by controlling the clock unit for stopping provision of all clocks by controlling the clock unit and for controlling the main regulator to be powered off when the restoration processor, wherein the PMU requests the restoration processor to store the registration information, completes the register information storing, when the transition from the sleep state to the active state is made.
申请公布号 KR101429674(B1) 申请公布日期 2014.08.13
申请号 KR20070091962 申请日期 2007.09.11
申请人 发明人
分类号 G06F1/26;G06F1/32 主分类号 G06F1/26
代理机构 代理人
主权项
地址