发明名称 |
Methods and apparatus related to a shared memory buffer for variable-sized cells |
摘要 |
In one embodiment, an apparatus includes a shared memory buffer including a lead memory bank and a write multiplexing module configured to send a leading segment from a set of segments to the lead memory bank. The set of segments includes bit values from a set of variable-sized cells. The write multiplexing module further configured to send each segment from the set of segments identified as a trailing segment to a portion of the shared memory mutually exclusive from the lead memory bank. |
申请公布号 |
US8804753(B2) |
申请公布日期 |
2014.08.12 |
申请号 |
US201213406219 |
申请日期 |
2012.02.27 |
申请人 |
Juniper Networks, Inc. |
发明人 |
Aybay Gunes |
分类号 |
H04L12/28;H04L12/56;H04Q11/04 |
主分类号 |
H04L12/28 |
代理机构 |
Cooley LLP |
代理人 |
Cooley LLP |
主权项 |
1. A method, comprising:
receiving at an input register a cell of an input signal, the input signal including a plurality of cells that includes the cell, the cell including a plurality of segments; determining whether a memory bank from a set of memory banks is a write destination of a segment from the plurality of segments when the segment is a leading segment of the cell, the set of memory banks defining at least a portion of a cut-through buffer; and modifying a flow rate of the segment through the memory bank in response to a flow control signal received at the input register. |
地址 |
Sunnyvale CA US |