Single slope AD converter circuit provided with compartor for comparing ramp voltage with analog input voltage

摘要

A single slope AD converter circuit includes a comparator that compares a ramp voltage varying with a predetermined slope as time elapses with an analog input voltage, a counter that counts a predetermined clock in parallel with the comparing process of the comparator, and a controller that outputs a clock count value corresponding to elapsed time when the ramp voltage is smaller than the analog input voltage, as an AD converted first digital value. The comparator compares the ramp voltage with a predetermined first reference voltage, the counter counts the clock in parallel with the comparing process, and the controller outputs the clock count value corresponding to the elapsed time as an AD converted second digital value.

主权项

1. A single slope AD converter circuit, comprising:
a comparator configured to compare a ramp voltage varying with a predetermined slope as time elapses with an analog input voltage; a counter configured to count a predetermined clock in parallel with the comparing process of the comparator, and a controller configured to output a clock count value corresponding to elapsed time when the ramp voltage is smaller than the analog input voltage, as an AD converted first digital value, wherein (A) the comparator compares the ramp voltage with a predetermined first reference voltage, the counter counts the clock in parallel with the comparing process, and the controller outputs the clock count value corresponding to the elapsed time as an AD converted second digital value, (B) the comparator compares the ramp voltage with a predetermined second reference voltage different from the first reference voltage, the counter counts the clock in parallel with the comparing process, and the controller outputs the clock count value corresponding to the elapsed time as an AD converted third digital value, and (C) the controller divides one of a difference between the first and second digital values, and a difference between the first and third digital values, by a difference between the second and third digital values, and outputs a value of a division result as a value corresponding to an AD converted value.