| 发明名称 | Memory circuits having a diode-connected transistor with back-biased control | ||
| 摘要 | A memory circuit including at least one memory array and at least one sleep transistor connected to the at least one memory array and connected to a first power line for providing a first power voltage. The memory circuit further includes at least one diode-connected transistor directly connected to the at least one memory array and directly connected to the first power line and a back-bias circuit electrically coupled with a bulk of the at least one diode-connected transistor. | ||
| 申请公布号 | US8804450(B2) | 申请公布日期 | 2014.08.12 |
| 申请号 | US201313790726 | 申请日期 | 2013.03.08 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Swei Steven;Scott David B. |
| 分类号 | G11C5/14 | 主分类号 | G11C5/14 |
| 代理机构 | Lowe Hauptman & Ham, LLP | 代理人 | Lowe Hauptman & Ham, LLP |
| 主权项 | 1. A memory circuit comprising: at least one memory array; at least one sleep transistor connected to the at least one memory array and connected to a first power line for providing a first power voltage; at least one diode-connected transistor directly connected to the at least one memory array and directly connected to the first power line; and a back-bias circuit electrically coupled with a bulk of the at least one diode-connected transistor. | ||
| 地址 | TW | ||