发明名称 |
Extreme high mobility CMOS logic |
摘要 |
A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate. |
申请公布号 |
US8802517(B2) |
申请公布日期 |
2014.08.12 |
申请号 |
US201313962890 |
申请日期 |
2013.08.08 |
申请人 |
Intel Corporation |
发明人 |
Datta Suman;Hudait Mantu K.;Doczy Mark L.;Kavalieros Jack T.;Amian Majumdar;Brask Justin K.;Jin Been-Yih;Metz Matthew V.;Chau Robert S. |
分类号 |
H01L21/338 |
主分类号 |
H01L21/338 |
代理机构 |
Blakely, Sokoloff, Taylor & Zafman LLP |
代理人 |
Blakely, Sokoloff, Taylor & Zafman LLP |
主权项 |
1. An NMOS transistor, comprising:
an indium phosphide (InP) substrate; an indium aluminum arsenide (InAlAs) buffer layer disposed above the InP substrate; a bottom barrier layer disposed above the InAlAs buffer layer; an indium arsenide (InAs) quantum well layer disposed above the bottom barrier layer; a top barrier layer disposed above the InAs quantum well layer; a gate stack disposed above the top barrier layer, the gate stack comprising: an aluminum oxide (Al2O3) high-k gate dielectric layer disposed above the top barrier layer; and a metal gate electrode disposed above the Al2O3high-k gate dielectric layer; and raised source and drain regions disposed above an etch stop layer disposed above the top barrier layer, the raised source and drain regions disposed on either side of the gate stack, wherein the raised source and drain regions are formed in an indium gallium arsenide (InGaAs) cap layer disposed above the etch stop layer. |
地址 |
Santa Clara CA US |