发明名称 Semiconductor transistor having trench contacts and method for forming therefor
摘要 Embodiments described herein relate to semiconductor transistors having trench contacts, in particular to semiconductor transistors having a field electrode below a gate electrode, and to related methods for producing semiconductor transistors having trench contacts.
申请公布号 US8803230(B2) 申请公布日期 2014.08.12
申请号 US201213350972 申请日期 2012.01.16
申请人 Infineon Technologies Austria AG 发明人 Poelzl Martin;Ehrentraut Georg
分类号 H01L21/336;H01L29/66 主分类号 H01L21/336
代理机构 Murphy, Bilak & Homiller, PLLC 代理人 Murphy, Bilak & Homiller, PLLC
主权项 1. A method for producing a semiconductor transistor component, comprising: providing a semiconductor body with a first surface defining a vertical direction; defining an active area, a first contact area and a second contact area; forming vertical trenches in the semiconductor body so that, in a vertical cross-section, a first vertical trench, a second vertical trench and a third vertical trench extend from the first surface into the semiconductor body, the first vertical trench being formed in the active area, the second vertical trench being formed in the first contact area, and the third vertical trench being formed in the second contact area; forming respective first conductive regions in the second vertical trench and in a lower portion of the first vertical trench so that the first conductive region in the second vertical trench extends above the first surface; forming respective second conductive regions in an upper portion of the first vertical trench and in an upper portion of the third vertical trench; forming an insulation layer in the first vertical trench, in the third vertical trench and on the first surface so that the insulation layer has a first recess above the second conductive region of the first vertical trench, a second recess above the second conductive region of the third vertical trench and a protrusion above the first conductive region of the second vertical trench; depositing a polycrystalline semiconductor layer on the insulation layer; and anisotropic etching the polycrystalline semiconductor layer to partly recess the insulation layer in the second recess while the insulation layer beneath the first recess remains covered.
地址 Villach AT