发明名称 |
Programmable engine having a reconfigurable accelerator data path for testing and calibration of analog front ends in radio devices |
摘要 |
Briefly, in accordance with one or more embodiments, a radio device comprises an analog front end comprising a radio to transmit and/or receive radio-frequency signals, and a programmable engine coupled to the analog front end. The programmable engine is capable of being programmed to perform one or more tests on the analog front end and includes a reconfigurable data path reconfigurable by the programmable engine to perform one or more tests on the analog front end. |
申请公布号 |
US8804856(B2) |
申请公布日期 |
2014.08.12 |
申请号 |
US201012910129 |
申请日期 |
2010.10.22 |
申请人 |
Intel Corporation |
发明人 |
Verhelst Marian K.;Lakdawala Hasnain;Soumyanath Krishnamurthy;Sajadieh Masoud |
分类号 |
H04L27/00 |
主分类号 |
H04L27/00 |
代理机构 |
Cool Patent, P.C. |
代理人 |
Cool Patent, P.C. |
主权项 |
1. An apparatus, comprising:
an analog front end comprising a radio to transmit or receive radio-frequency signals, or combinations thereof; and a programmable engine coupled to the analog front end, wherein the programmable engine is configured to perform one or more tests on the analog front end; wherein the programmable engine includes a reconfigurable data path reconfigurable by the programmable engine to perform one or more tests on the analog front end, and a post processing module, the post processing module including one or more reconfigurable accelerator blocks to perform processing routines for the one or more tests, and a reconfigurable interconnect to connect or sequence the one or more accelerator blocks according to the test to be performed by the programmable engine. |
地址 |
Santa Clara CA US |