发明名称 Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
摘要 With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
申请公布号 US8806248(B2) 申请公布日期 2014.08.12
申请号 US201314041688 申请日期 2013.09.30
申请人 Intel Corporation 发明人 Allarey Jose P.;George Varghese;Jahagirdar Sanjeev S.;Lamdan Oren;Nathan Ofer;Ziv Tomer
分类号 G06F1/00;G06F1/32 主分类号 G06F1/00
代理机构 Trop, Pruner & Hu, P.C. 代理人 Trop, Pruner & Hu, P.C.
主权项 1. A processor comprising: a plurality of cores each including clock generation circuitry and a phase locked loop; and a control logic to increase an operating frequency of at least one of the plurality of cores during a turbo mode in which at least one other of the plurality of cores is idle, wherein the at least one other of the plurality of cores is to communicate a core power status to the at least one core via a link interface.
地址 Santa Clara CA US