发明名称 |
Three-dimensional chip stack and method of forming the same |
摘要 |
A three dimensional (3D) chip stack includes a first chip bonded to a second chip. The first chip includes a first bump structure overlying the first substrate, and the second chip includes a second bump structure overlying the second substrate. The first bump structure is attached to the second bump structure, and a joining region is formed between the first bump structure and the second bump structure. The joining region is a solderless region which includes a noble metal. |
申请公布号 |
US8803333(B2) |
申请公布日期 |
2014.08.12 |
申请号 |
US201213544746 |
申请日期 |
2012.07.09 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Yu Chen-Hua;Shih Da-Yuan;Tung Chih-Hang |
分类号 |
H01L29/40;H01L23/48;H01L23/52;H01L23/488 |
主分类号 |
H01L29/40 |
代理机构 |
Lowe Hauptman & Ham, LLP |
代理人 |
Lowe Hauptman & Ham, LLP |
主权项 |
1. A device, comprising:
a first chip comprising a first substrate and a first bump structure overlying the first substrate; and a second chip comprising a second substrate and a second bump structure overlying the second substrate, the first chip being bonded to the second chip by a solderless joint between the first bump structure and the second bump structure, the solderless joint having a joining region between the first bump structure and the second bump structure, wherein the joining region between the first chip and the second chip comprises a noble metal, the first bump structure comprises a metallization layer overlying the first substrate and a protection layer formed between the ioining region and the metallization layer, and a region between the first and the second chip is free from an adhesive material. |
地址 |
TW |