| 发明名称 | Semiconductor chips including passivation layer trench structure | ||
| 摘要 | An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer. | ||
| 申请公布号 | US8803318(B2) | 申请公布日期 | 2014.08.12 |
| 申请号 | US201313852296 | 申请日期 | 2013.03.28 |
| 申请人 | International Business Machines Corporation | 发明人 | Kulkarni Deepak;Lane Michael W.;Nitta Satyanayana V.;Ponoth Shom |
| 分类号 | H01L23/48 | 主分类号 | H01L23/48 |
| 代理机构 | Cantor Colburn LLP | 代理人 | Cantor Colburn LLP ;Zehrer Matthew |
| 主权项 | 1. An integrated circuit, the integrated circuit including an active region and a passive region, the circuit also including a cut line in the passive region, the integrated circuit comprising: a passivation layer that includes an outer nitride layer over an oxide layer; a crack stop below the passivation layer and in the passive region; a solder ball in the active region; wherein the passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer. | ||
| 地址 | Armonk NY US | ||