| 发明名称 | Nonvolatile semiconductor memory device and method of manufacturing | ||
| 摘要 | A nonvolatile semiconductor memory device includes a first insulating layer on a semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The charge storage layer includes a floating gate layer on the first insulating layer, an interface insulating layer on the floating gate layer, and a charge trap layer on the interface insulating layer, and a lower end of a conduction band of the interface insulating layer is higher than a trap level of the charge trap layer and is lower than a lower end of a conduction band of the charge trap layer. | ||
| 申请公布号 | US8803219(B2) | 申请公布日期 | 2014.08.12 |
| 申请号 | US201313748101 | 申请日期 | 2013.01.23 |
| 申请人 | Kabushiki Kaisha Toshiba | 发明人 | Sato Motoyuki |
| 分类号 | H01L29/788 | 主分类号 | H01L29/788 |
| 代理机构 | Holtz, Holtz, Goodman & Chick PC | 代理人 | Holtz, Holtz, Goodman & Chick PC |
| 主权项 | 1. A nonvolatile semiconductor memory device comprising: a semiconductor layer; a first insulating layer on the semiconductor layer; a charge storage layer on the first insulating layer; a second insulating layer on the charge storage layer; and a control gate electrode on the second insulating layer, wherein the charge storage layer includes a floating gate layer on the first insulating layer, an interface insulating layer on the floating gate layer, and a charge trap layer on the interface insulating layer, wherein the charge trap layer includes a first material, and the interface insulating layer includes a second material in which an alkali metal is added to the first material, and wherein a lower end of a conduction band of the interface insulating layer is higher than a trap level of the charge trap layer and is lower than a lower end of a conduction band of the charge trap layer. | ||
| 地址 | Tokyo JP | ||