发明名称 Stacked memory with redundancy
摘要 A stacked memory is disclosed including a first integrated circuit memory chip having first storage locations and stacked with a second integrated circuit memory chip. A redundant memory is shared by the first and second integrated circuit memory chips and has redundant storage locations that selectively replace corresponding storage locations in the first or second integrated circuit memory chips. The stacked memory also includes a pin interface for coupling to an external integrated circuit memory controller and respective first and second signal paths. The first signal path is formed through the first and second integrated circuit memory chips and is coupled to the redundant memory and to the pin interface. The second signal path is formed through the first and second integrated circuit memory chips and is coupled to the redundant memory and to the pin interface via the first signal path.
申请公布号 US8804394(B2) 申请公布日期 2014.08.12
申请号 US201213728330 申请日期 2012.12.27
申请人 Rambus Inc. 发明人 Ware Frederick A.;Franzon Paul D.
分类号 G11C5/02 主分类号 G11C5/02
代理机构 Peninsula Patent Group 代理人 Kreisman Lance;Peninsula Patent Group
主权项 1. A stacked memory comprising: a first integrated circuit memory chip having first storage locations; a second integrated circuit memory chip disposed in a stacked relationship with the first integrated circuit memory chip, the second integrated circuit memory chip having second storage locations; a redundant memory shared by the first and second integrated circuit memory chips, the redundant memory having redundant storage locations that selectively replace corresponding storage locations in the first or second integrated circuit memory chips; a pin interface for coupling to an external memory controller; a first signal path formed through the first and second integrated circuit memory chips and coupled to the redundant memory, the first signal path coupled to the pin interface; and a second signal path formed through the first and second integrated circuit memory chips and coupled to the redundant memory, the second signal path coupled to the pin interface via the first signal path.
地址 Sunnyvale CA US