COMPENSATION LOOP FOR READ VOLTAGE ADAPTATION

摘要

The present invention relates to a system and method for nominal read voltage variations of a flash device. Each of N reading operations is performed in a voltage offset selected from an initial read voltage. An N bit digital pattern associated with the selected voltage offsets is generated for the N reading operations. The N bit digital pattern generated by the N reading operations is mapped to a signed representation. A voltage adjustment based on the signed representation is applied to at least partially compensate for a variation of the nominal read voltage in order to reduce a bit error rate of the flash device.