发明名称 |
Extended-width shifter for arithmetic logic unit |
摘要 |
A processor includes a shift device for extending the width of a rotator without increasing propagation delays. An extended-width result is obtained by combining a rotation result with a shift result in accordance with a mask that is selected in response to at least a portion of the value of the degree to which a data word is to be shifted. |
申请公布号 |
US8805903(B2) |
申请公布日期 |
2014.08.12 |
申请号 |
US201113175938 |
申请日期 |
2011.07.04 |
申请人 |
Texas Instruments Incorporated |
发明人 |
Anderson Timothy D.;Moharil Shriram D. |
分类号 |
G06F5/01 |
主分类号 |
G06F5/01 |
代理机构 |
|
代理人 |
Marshall, Jr. Robert D.;Telecky, Jr. Frederick J. |
主权项 |
1. An extended-width shifter, comprising:
a rotator arranged to sequentially rotate each bit of a first portion of a data word by a number of bit positions that is indicated by a first portion of a received shift degree to generate a rotation result, wherein each bit rotated out of the received first portion of a word is sequentially rotated in to an opposing vacated portion of the received first portion of a word to generate a wrap-around portion of the rotation result; a shifter arranged to sequentially shift each bit of a second portion of the data word by a number of bit positions that is indicated by a second portion of the received shift degree to generate a shift result, wherein the second portion of the shift degree includes lower-order bits of the first portion of the shift degree; and a bit-wise selector that is arranged to produce an extended-width result by using a mask to individually select one bit between of each bit of the shift result and each bit of a portion of the rotation result that includes the wrap-around portion of the rotation result, wherein the mask is selected at least in response to the second portion of the shift degree. |
地址 |
Dallas TX US |