发明名称 POWER MODE REGISTER REDUCTION AND POWER RAIL BRING UP ENHANCEMENT
摘要 Aspects of power mode register reduction and power rail bring up enhancements are described. In one embodiment, an operating parameter for a first power rail is set by power management circuit according to a predetermined programmed setting. In connection with a wait time, the power rail is enabled, and a processor is released to start. In turn, at least one of a command to modify the operating parameter for the first power rail or a command to set an operating parameter for a second power rail is received from the processor over a high speed interface. By accessing a grouped operating register for a group of power rails, the processor can update or modify settings of an entire group of power rails at one time. In connection with the processor, the power management circuit can power up a plurality of power rails in a flexible and efficient manner.
申请公布号 US2014223153(A1) 申请公布日期 2014.08.07
申请号 US201313950738 申请日期 2013.07.25
申请人 Broadcom Corporation 发明人 Hsieh Chih-Tsung;Lee Hao-zheng;Nabhane Walid;Alarcon Veronica;Fullerton Mark Norman
分类号 G06F1/26 主分类号 G06F1/26
代理机构 代理人
主权项 1. A method, comprising: setting, by a power management circuit, an operating parameter for a first power rail according to a predetermined programmed setting; releasing a processor to start; and receiving, via an interface of the power management circuit, at least one of a command to modify the operating parameter for the first power rail or a command to set an operating parameter for a second power rail.
地址 Irvine CA US