Programming Select Gate Transistors And Memory Cells Using Dynamic Verify Level

摘要

Programming accuracy is increased for select gate transistors and memory cells by using a dynamic verify voltage which increases from an initial level to a final level during a programming operation. Faster-programming transistors are locked out from programming before slower-programming transistors, but experience program disturb which increases their threshold voltage to a common level with the slower-programming transistors at the conclusion of the programming operation. For programming of memory cells to different target data states, an offset between the initial and final verify levels can be different for each data state. In one approach, the offset is greater for lower target data states. The increases in the dynamic verify voltage can be progressively smaller with each subsequent program-verify iteration of the programming operation. The start of the increase can be adapted to the programming progress or can be at a predetermined program-verify iteration.

主权项

1. A method for programming transistors in a memory device, comprising:
performing each program-verify iteration of a plurality of program-verify iterations, the plurality of program-verify iterations comprise program-verify iterations for a set of transistors which are to be programmed in a programming operation, each transistor initially has a program status which indicates that the transistor is to be programmed, the performing each program-verify iteration comprises applying a program pulse to the set of transistors, determining whether a threshold voltage of at least some of the transistors with the program status exceeds a lockout verify voltage and changing the program status to a lockout status for a remainder of the programming operation for each of the transistors for which the threshold voltage is determined to exceed the lockout verify voltage, the lockout verify voltage is stepped up in multiple program-verify iterations of the program-verify iterations for the set of transistors.