| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique which can avoid system down due to a power supply device being in an overcurrent state, and also suppress a load in controlling power supply.SOLUTION: When a PSU (Power Supply Unit) 40 asserts an overcurrent detection signal LPO_N, its logical value is held by a latch 111 and output to each AND gate 114 of a signal switch unit 14. Each AND gate 114 outputs NAND of the logical value output from the latch 111 and a value of a register 113 connected with the AND gate 114, to a corresponding system board 20. The system board 20 having received input of AND of which value is one, suppresses power consumption. Thus, when the overcurrent detection signal LPO_N is asserted, in response to the assertion, the system board 20 which receives the AND from the AND gate 114 connected with the register 113 storing zero, suppresses power consumption. |
