| 摘要 |
When opaque films are deposited on semi-conductor wafers, underlying alignment marks 106, 108 may be concealed. The re-exposure of such alignment marks 106, 108 is one source of resulting surface topography. In accordance with one implementation, alignment marks 106,108 embedded in a wafer 102 may be exposed by removing material from one or more layers and by replacing such material with a transparent material. In accordance with another implementation, the amount of material removed in an alignment mark recovery process may be mitigated by selectively ashing or etching above a stop layer. |
