发明名称 METHOD FOR DETERMINING INTERFACE TIMING OF INTEGRATED CIRCUIT AUTOMATICALLY AND RELATED MACHINE READABLE MEDIUM THEREOF
摘要 A method for determining an interface timing of an integrated circuit includes: reading a netlist file and a timing constraint file of the integrated circuit, and determining a first interface port of the netlist file according to the netlist file and the timing constraint file; determining a first transmission path and a load on the first transmission path between the first interface port and a specific circuit element in the netlist file; generating an interface circuit file according to the first transmission path and the load on the first transmission path; and calculating a first signal transmission time of the first transmission path out according to the interface circuit file.
申请公布号 US2014223398(A1) 申请公布日期 2014.08.07
申请号 US201314051455 申请日期 2013.10.11
申请人 Realtek Semiconductor Corp. 发明人 Yu Mei-Li;Wang Ting-Hsiung;Lo Yu-Lan;Kao Shu-Yi
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A method for determining an interface timing of an integrated circuit, comprising: reading a netlist file and a timing constraint file of the integrated circuit, and determining a first interface port of the netlist file according to the netlist file and the timing constraint file; determining a first transmission path and a load on the first transmission path between the first interface port and a specific circuit element in the netlist file; generating an interface circuit file according to the first transmission path and the load on the first transmission path; and calculating a first signal transmission time of the first transmission path according to the interface circuit file.
地址 HsinChu TW