发明名称 CIRCUIT ANALYSIS DEVICE AND CIRCUIT ANALYSIS METHOD
摘要 A circuit analysis device includes: a processor configured to execute a procedure by: calculating, for power supply noise included in a power supply voltage supplied to a semiconductor memory device, variation characteristics of an electric potential relative to the power supply voltage in a specific memory cell included in a memory cell array; calculating power supply noise of a power supply system that occurs when a current is supplied to an equivalent circuit of the power supply system under a predetermined condition, the power supply system including a power supply line and an element for supplying a power supply voltage from a voltage source to a semiconductor device; calculating, from the variation characteristics, the electric potential obtained when the power supply noise is equal to a specific magnitude; and determining, by comparing the calculated electric potential with a threshold, whether memory latch-up will occur in the specific memory cell.
申请公布号 US2014223399(A1) 申请公布日期 2014.08.07
申请号 US201314106278 申请日期 2013.12.13
申请人 FUJITSU LIMITED 发明人 SATO Tomio
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A circuit analysis device comprising: a storage device configured to store a procedure for implementing circuit analysis and data used for the circuit analysis device; and a processor configured to execute the procedure by: first calculating, for power supply noise included in a power supply voltage supplied to a semiconductor memory device, variation characteristics of an electric potential relative to the power supply voltage in a specific memory cell included in a memory cell array of the semiconductor memory device;second calculating power supply noise of a power supply system that occurs when a current is supplied to an equivalent circuit of the power supply system under a predetermined condition, the power supply system including a power supply line and an element for supplying a power supply voltage from a voltage source to a semiconductor device including the semiconductor memory device;third calculating, from the variation characteristics, the electric potential obtained when the power supply noise is equal to a specific magnitude; anddetermining, by comparing the calculated electric potential with a threshold, whether memory latch-up will occur in the specific memory cell.
地址 Kawasaki-shi JP