发明名称 OVER-LIMIT ELECTRICAL CONDITION PROTECTION CIRCUITS FOR INTEGRATED CIRCUITS
摘要 Protection circuits and methods for protecting an integrated circuit against an over-limit electrical condition are provided. One example includes a snapback circuit having at least a portion formed in an isolated doped well region and configured to switch to a low impedance state in response to an input exceeding a trigger condition and further having a control circuit coupled to a reference voltage and further coupled to the isolated doped well region and the portion of the snapback circuit formed in the doped well region. The control circuit includes an impedance adjustable in response to a control signal and configured to adjust an isolated doped well impedance in which at least a portion of the snapback circuit is formed relative to the reference voltage. A modulated trigger and hold condition tot the snapback circuit can be set according to a control signal adjusting an electrical impedance of the control circuit.
申请公布号 US2014218830(A1) 申请公布日期 2014.08.07
申请号 US201414246309 申请日期 2014.04.07
申请人 Micron Technology, Inc. 发明人 Chaine Michael;Fan Xiaofeng
分类号 H02H9/04 主分类号 H02H9/04
代理机构 代理人
主权项 1. An apparatus, comprising: a snap-back circuit coupled to a node and configured to discharge a first over-voltage condition when triggered responsive to a first trigger condition and further configured to discharge a second over-voltage condition when triggered responsive to a second trigger condition; a first circuit to modulate the first trigger condition of the snap-back circuit; and a second circuit to modulate the second trigger condition of the snap-back circuit, wherein the second trigger condition is different than the first trigger condition.
地址 Boise ID US