发明名称 |
CAPPING DIELECTRIC STRUCTURE FOR TRANSISTOR GATES |
摘要 |
The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process. |
申请公布号 |
EP2761664(A1) |
申请公布日期 |
2014.08.06 |
申请号 |
EP20110873523 |
申请日期 |
2011.09.30 |
申请人 |
INTEL CORPORATION |
发明人 |
ROSENBAUM, AARON W.;MEI, DIN-HOW;PRADHAN, SAMEER S. |
分类号 |
H01L29/78;H01L21/336 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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