发明名称 |
Inkjet head driving device |
摘要 |
According to one embodiment, an inkjet head driving device includes a load-voltage generating circuit and a plurality of channel driving circuits provided to respectively correspond to a plurality of channels of an inkjet head. The load-voltage generating circuit selects any one voltage out of a reference voltage and a driving voltage having potential other than the reference voltage and outputs the voltage. Each of the channel driving circuits includes a first input terminal, a second input terminal, a third input terminal, an output terminal, a series circuit, and a parallel circuit. |
申请公布号 |
US8794726(B2) |
申请公布日期 |
2014.08.05 |
申请号 |
US201313768162 |
申请日期 |
2013.02.15 |
申请人 |
Toshiba Tec Kabushiki Kaisha |
发明人 |
Hiyoshi Teruyuki;Nitta Noboru;Kimura Mamoru;Yoshimaru Tomohisa |
分类号 |
B41J29/38;B41J2/045;B41J2/14 |
主分类号 |
B41J29/38 |
代理机构 |
Amin, Turocy & Watson, LLP |
代理人 |
Amin, Turocy & Watson, LLP |
主权项 |
1. An inkjet head driving device comprising:
a load-voltage generating circuit configured to select any one voltage out of a reference voltage and a driving voltage having potential other than the reference voltage and output the voltage; and a plurality of channel driving circuits respectively provided to correspond to a plurality of channels of an inkjet head, each of the channel driving circuits including a first input terminal to which the driving voltage is applied, a second input terminal to which the reference voltage is applied, a third input terminal to which the voltage output from the load-voltage generating circuit is applied, an output terminal from which the reference voltage or the driving voltage is output to the channel corresponding to the output terminal, a series circuit in which a first switching element and a second switching element are connected in series between the first input terminal and the second input terminal and a connection point of the first switching element and the second switching element is connected to the output terminal, and a parallel circuit in which a third switching element and a fourth switching element are connected in parallel between the third input terminal and the output terminal. |
地址 |
Tokyo JP |