发明名称 Three dimensional memory structure
摘要 A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 microns in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
申请公布号 US8796862(B2) 申请公布日期 2014.08.05
申请号 US201313963164 申请日期 2013.08.09
申请人 发明人 Leedy Glenn J
分类号 H01L23/48 主分类号 H01L23/48
代理机构 Useful Arts IP 代理人 Useful Arts IP
主权项 1. A stacked circuit structure comprising: a plurality of stacked, thin, substantially flexible circuit layers each comprising a top surface and a bottom surface and at least one of which comprises a thinned, substantially flexible monocrystalline semiconductor substrate of one piece; and an interlayer region disposed between a pair of vertically adjacent circuit layers and extending from a top surface of one of the pair of vertically adjacent circuit layers to a bottom surface of another one of the pair of vertically adjacent circuit layers, the interlayer region comprising an interlayer for providing mechanical attachment and electrical interconnection between the pair of vertically adjacent circuit layers; wherein within the interlayer region the stacked circuit structure consists essentially of metal or metal and silicon-based dielectric.
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