Virtually substrate-less composite power semiconductor device

摘要

A virtually substrate-less composite power semiconductor device (VSLCPSD) and method are disclosed. The VSLCPSD has a power semiconductor device (PSD), a front-face device carrier (FDC) made out of a carrier material and an intervening bonding layer (IBL). Both carrier and IBL material can be conductive or non-conductive. The PSD has back substrate portion, front semiconductor device portion with patterned front-face device metallization pads and a virtually diminishing thickness TPSD. The FDC has patterned back-face carrier metallizations contacting the front-face device metallization pads, patterned front-face carrier metallization pads and numerous parallelly connected through-carrier conductive vias respectively connecting the back-face carrier metallizations to the front-face carrier metallization pads. The FDC thickness TFDC is large enough to provide structural rigidity to the VSLCPSD. The diminishing thickness TPSD effects a low back substrate resistance and the through-carrier conductive vias effect a low front-face contact resistance to the front-face device metallization pads.

主权项

1. A substrate-less composite power semiconductor device (VSLCPSD) comprising:
a sandwich structure comprising a power semiconductor device (PSD) made out of a semiconductor device material, a front-face device carrier (FDC) made out of a carrier material, and an intervening bonding layer (IBL) between the PSD and the FDC, wherein the PSD is a vertical power semiconductor device (VPSD) with a back metallization covering the entire back surface of the VPSD forming a major electrode on its back surface, wherein the IBL covers the entire front surface of the PSD and the entire IBL is sandwiched between the PSD and the FDC; the PSD having a back substrate portion and a front semiconductor device portion with two or more patterned front-face device metallization pads separated by a top passivation, the PSD further having a thickness TPSD comparable to a thickness of the front semiconductor device portion; and the FDC having two or more patterned front-face carrier metallization pads and a plurality of through-carrier conductive vias respectively electrically connecting the front-face carrier metallization pads to the front-face device metallization pads, wherein the through-carrier conductive vias penetrate through the IBL.