发明名称 Seamlessly encrypting memory regions to protect against hardware-based attacks
摘要 Systems, apparatuses, and methods, and for seamlessly protecting memory regions to protect against hardware-based attacks are disclosed. In one embodiment, an apparatus includes a decoder, control logic, and cryptographic logic. The decoder is to decode a transaction between a processor and memory-mapped input/output space. The control logic is to redirect the transaction from the memory-mapped input/output space to a system memory. The cryptographic logic is to operate on data for the transaction.
申请公布号 US8799673(B2) 申请公布日期 2014.08.05
申请号 US200912651432 申请日期 2009.12.31
申请人 Intel Corporation 发明人 Savagaonkar Uday R.;Sahita Ravi;Durham David;Long Men
分类号 H04L29/06 主分类号 H04L29/06
代理机构 代理人 Lane Thomas R.
主权项 1. An apparatus comprising: a decoder to decode one of a memory read and a memory write transaction on a connection between a first hardware component and a second hardware component in the apparatus, the transaction from a processor to a first address, the first address in a memory-mapped input/output space; control logic to, in response to the decoder determining that the first address is within a protected region, redirect the transaction from the first address to second address, the second address in a system memory; and cryptographic logic to operate on data for the transaction.
地址 Santa Clara CA US