Linear to physical address translation with support for page attributes

摘要

Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed.

主权项

1. A machine-implemented method comprising:
receiving an instruction to translate a virtual memory pointer to a physical memory address for a memory location without accessing data stored at the physical memory address in response to the instruction; translating the virtual memory pointer to the physical memory address based on page table information; and returning in one or more registers, as a result of the instruction to translate the virtual memory pointer to the physical memory address for the memory location without accessing data stored at the physical memory address in response to the instruction, the physical memory address and one or more page attributes without returning data stored at the physical memory address in response to the instruction, the one or more page attributes including a set of access bits, wherein returning in said one or more registers, the physical memory address and the one or more page attributes in response to the instruction comprises: obtaining the physical memory address and the one or more page attributes from a translation look-aside buffer entry to return in said one or more registers in response to the instruction.